Problem $3$

Consider the following assembly language code:

Consider a pipeline with forwarding, hazard detection, and $1$ delay slot for branches. The pipeline is the typical $5-$stage IF$,$ ID$,$ EX$,$ MEM, WB MIPS design

the above code, complete the pipeline diagram below $($instructions on the left, cycles on top$)$ for the code. Insert the characters IF$,$ ID$,$ EX$,$ MEM, WB for ea

instruction in the boxes. Assume that there two levels of bypassing, that the second half of the decode stage performs a read of source registers, and that the

half of the write$-$back stage writes to the register file. Label all data stalls $($Draw an $x$ in the box$).$ Label all data forwards that the forwarding unit detects $($at

between the stages handing off the data and the stages receiving the data$).$

$($a$)$ What is the final execution time of the code?