Problem $6$

Consider the following RISC$-$V code running on the standard $5-$stage pipeline.

LW x$2,4($x$3)$ ;; Instruction X

SW x$2,0($x$3)$ ;; Instruction A

OR x$1,$ x$2,$ x$3$ ;; Instruction B

BEQ x$2,$ x$1,$ L ;; Instruction C

OR x$2,$ x$2,$ x$0$ ;; Instruction D

L: ADD x$4,$ x$1,$ x$3$ ;; Instruction E

Part$($a$)$ Identify all control and RAW data hazards. If you think there is a RAW data hazard between instructions A and B due to register x$2,$ then you should say

A $$ B RAW Data Hazard on Register x$2$

You will get $-2$ point for each wrong answer to prevent random guessing an$($d$)/($o$)$r listing all dependencies hoping some would be correct.

Part $($b$)$ Rewrite the above program inserting the minimum number of NOPs $($stalls$)$ so that the program runs correctly on the $5-$stage RISC$-$V pipeline that does NOT have any forwarding logic. However, the register file is written in first half of the cycle and read in the second half of the cycle. You can assume that branches are resolved in ID stage, which means the register comparison and computation of the branch target address takes place in ID stage, and the correct instruction is available in the following cycle. There is NO branch prediction.

Part $($c$)$ Now assume with full forwarding and branch prediction we eliminated ALL the stall$($s$)/($N$)$OPS$.$ What is the average CPI of the program?