Q$1.$ Create the Verilog code and test bench for a two$-$input AND gate. Include all input patterns

in your test bench. After writing your code, run it on the EDA playground tool. Log in to EDA

playground and select the SystemVerilog$/$Verilog option under "Languages and Libraries."

Choose "Icarus Verilog $12\mathrm{.}0"$ from the "Tools & Simulators" dropdown. Additionally, make sure

to click on the "Open EPWave after run" tab. Capture the output waveform screenshot in your

solution.