Question: Q6. A computer uses a byte-addressable virtual memory system with a four-entry TLB and a page table for a process P. Pages are 16 bytes
Q6. A computer uses a byte-addressable virtual memory system with a four-entry TLB and a page table for a process P. Pages are 16 bytes in size. Assume, for the sake of this problem, that main memory contains only 8 frames and that the TLB and page table contents for Process P are as shown below:
|
| TLB |
| |
|
| 0 | 7 | |
|
|
|
| |
|
|
|
| |
|
| 4 | 6 | |
|
| Page Table | |
|
| frame | Valid |
| 0 | 7 | 1 |
| 1 | 3 | 1 |
| 2 | - | 0 |
| 3 | 5 | 1 |
| 4 | 6 | 1 |
| 5 | - | 0 |
| 6 | - | 0 |
| 7 | - | 0 |
| 8 | - | 0 |
| 9 | 2 | 1 |
| 10 | 1 | 1 |
| 11 | - | 0 |
| 12 | - | 0 |
| 13 | 0 | 1 |
| 14 | 4 | 1 |
| 15 | - | 0 |
(a) What is the minimum number of bits required for virtual addresses?
(b) What is the minimum number of bits required for physical addresses?
(c) List the steps necessary to convert the virtual address 0x97 to a physical address and express that address in hexadecimal format.
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