Question $\backslash$#$1$: A processor executes arithmetic instructions in $5$ cycles, branch instructions in $4$ cycles and memory instructions in $10$ cycles. You have a program where $\backslash (30\backslash \%\backslash )$ of all instructions are arithmetic instructions, $\backslash (35\backslash \%\backslash )$ of all instructions are memory instructions, and the rest are branch instructions. You figured out that the processor cannot execute the program fast enough to meet your performance goals. Your goal is to reduce the execution time of this program by at least $\backslash (10\backslash \%\backslash ).$ Hence, you decide to change the processor design to improve the performance of arithmetic instructions. In the new processor design, at most how many cycles should the execution of a single arithmetic instruction take to reduce the execution time of the entire program by at least $\backslash (10\backslash \%\backslash )?$ Show your work.

Question $\backslash$#$2$: The execution time of a given benchmark is $100$ ms on a $500$ MHz processor. Assume you are designing the next generation of the processor; notice that a new implementation enables the processor to run at $750$ MHz $.$ However, the modifications increase the CPI by $20\backslash \%$ for the same benchmark.

$($a$)$ What is the execution time expressed in terms of the number of cycles taken for the old generation of the processor $($i$.$e$.,$ before the modifications$)?$ Assuming that the IPC is $2,$ what is the number of instructions in the benchmark?

$($b$)$ What is the execution time of the benchmark in milliseconds for the new generation of the processor?

$($c$)$ What is the speedup or slowdown of the new generation processor over the old generation?