Single$-$Cycle

Single$-$cycle processor design $($assume the design in our class$)$: Assume the

control signal values for ALUOp: $01$ for$$fc dependent$$

$,10$ for addition,

$00$ for subtraction. What are the values of all control signals for the

following instruction? Give your answer with the sequence: Branch, Jump,

RegDst, RegWrite, ALUSrc, ALUOp, MemWrite, MemtoReg, MemRead.

$($a$)[8\%]$ Instruction beq

$($b$)[8\%]$ Instruction addi $($if it is included in the instruction set$)$