This exercise refers to the files:

full adder $4$bit ripple carry behavioral

model.sv

full adder $4$bit ripple carry behavioral model

testbench.sv

a$.$ After loading these files into the EDA playground, run a simulation and include a timing diagram of your simulation in your report.

b$.$ Edit the design and test bench files in order to convert the $4-$bit adder into an $8-$bit adder. Choose four different pairs of values for the a and $b$ operands $($with cin $=0).$

i$.$ Run a simulation and include your code and a timing diagram of your simulation in your report.

ii$.$ For the four sets of values you chose, verify $\text{'}$by hand' the addition took place correctly by comparing your timing diagram results with the answers you computed by hand. Make sure to refer to the timing diagram in your report in order to show exactly where your predicted result is