uppose we have a cache /memory system with the following parameters: L1 cache with-a 5% miss rate cache hits require 1 clock cycle . Clock rate of 1 GHz(1 clock cycle 1 nanosecond) Memory system accesses require 20 nanoseconds Answer the following questions: 1 What is the average memory access time for a system with only a L1 cache? 2. We decide to add a second L2 cache that will be accessed only when accesses miss the L1 cache. If the L2 cache has a miss rate of 1%, what percentage of memory accesses will miss both caches and actually access memory