VHDL--Make a 32-bit serial adder with accumulator using state machine.

Make a 32-bit serial adder with accumulator. The control circuit uses a 5-bit counter. which outputs a signal K-1 when it is in state 1 1 1 1 1 . When start signal(S) is received, the registers should be loaded. S, will remain 1 until the addition is complete. When the addition is complete, the control circuit should go to a stop state. and remain there until St is changed back to 0. e Draw a state diagram for the adder circuit (excluding the counter) Make a 32-bit serial adder with accumulator. The control circuit uses a 5-bit counter. which outputs a signal K-1 when it is in state 1 1 1 1 1 . When start signal(S) is received, the registers should be loaded. S, will remain 1 until the addition is complete. When the addition is complete, the control circuit should go to a stop state. and remain there until St is changed back to 0. e Draw a state diagram for the adder circuit (excluding the counter)