Question: Write a Test Bench program to test your 3-bit Add/Sub by simulation. The 3-bit Add/Sub includes 3 instances of FullAdder(FA) core and 3 instances of

Write a Test Bench program to test your 3-bit Add/Sub by simulation. The 3-bit Add/Sub includes 3 instances of FullAdder(FA) core and 3 instances of XOR gate.

FullAdder: Input ports: A, B, Ci

Output ports: Co, S

Block Diagram: Input ports: A0, A1, A2, B0, B1, B2, Cin

Output ports: S0, S1, S2, Cout

FA 0 AO Co SO xup_xor2_0 FA v1 0 in BO XUP 2-input XOR FA 1 A1 Co S1 Xup_xor2_1 FAv1 0 B1 XUP 2-input XOR FA 2 xup xor2_2 FA v1 0 B2 XUP 2-input XOR FA 0 AO Co SO xup_xor2_0 FA v1 0 in BO XUP 2-input XOR FA 1 A1 Co S1 Xup_xor2_1 FAv1 0 B1 XUP 2-input XOR FA 2 xup xor2_2 FA v1 0 B2 XUP 2-input XOR

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