(a) Create the four-bit shift register in Figure 5-46(a) using the LPM_ FF megafunction in a schematic and functionally simulate.

(b) Create the four-bit shift register in Figure 5-46(a) using an HDL and functionally simulate.

Figure 5-46(a)

DATA J X J CLK VII X3 K X K (a) IN Shift pulses J CLK K X3 CLK X J CLK X K Xo X