Arithmetic Circuits Adder Subtractor for signed numbers with Overflow detector A, B, X, Y, S, Z represent 4-bit numbers in 2's complement form Note that the range of a 4-bit number in 2's complement is -8 to +7. An arithmetic operation on two 4-bit number in 2's complement A and B may result in overflow (OVF) as discussed in class. OVF=1 (there is an overflow). 11 Y Y Y Yo 27 y! YYY XXX SC 4-6 binary adder C + S OVE M Design subnetworks N and M and then implement them. (see lecture notes) The operation of network N is: If C0, Y=b (Add) If C=1, Y=b' (Subtract) Mis an overflow detector a) Determine the result produced by the circuit if: 1- A-0011, B=1110 s-0, 2-A=1110, s-1, B-1111, 3- A=1100, B=0010 s=0, 4- A=1100,B=s=1 A(A3A2A1A0) B (B3B2B1BO)SS3 S2 S1 SO COUTOVE (You can add 1- bit full adder in Multisim by selecting Place Component Misc Digitalfull adder, 4-bit full adder 74LS83, XOR gate (74LS86)) Arithmetic Circuits Adder Subtractor for signed numbers with Overflow detector A, B, X, Y, S, Z represent 4-bit numbers in 2's complement form Note that the range of a 4-bit number in 2's complement is -8 to +7. An arithmetic operation on two 4-bit number in 2's complement A and B may result in overflow (OVF) as discussed in class. OVF=1 (there is an overflow). 11 Y Y Y Yo 27 y! YYY XXX SC 4-6 binary adder C + S OVE M Design subnetworks N and M and then implement them. (see lecture notes) The operation of network N is: If C0, Y=b (Add) If C=1, Y=b' (Subtract) Mis an overflow detector a) Determine the result produced by the circuit if: 1- A-0011, B=1110 s-0, 2-A=1110, s-1, B-1111, 3- A=1100, B=0010 s=0, 4- A=1100,B=s=1 A(A3A2A1A0) B (B3B2B1BO)SS3 S2 S1 SO COUTOVE (You can add 1- bit full adder in Multisim by selecting Place Component Misc Digitalfull adder, 4-bit full adder 74LS83, XOR gate (74LS86))