Design a 4-bit shift register using four DFFs (74LS74) The circuit should have one input called In, and four outputs Q1-04. It should have a clock signal to indicate the change of state. It should have a Clear input to clear the data of all outputs. The following table shows the function of a 4-bit shift register Iteration In (clock tick) 01 02 Q4 0) 10 Draw the logic diagram of your circuit. (If you need a hint: connect the output Q of one DFF to the input D of another DFF and see what happens.)