Question: Given the following VHDL code: library fee: use leee.std_logic_1164.all; entity funcis port in sed logic; b: in std logic; C: instd.logie: x out std. Logic;

Given the following VHDL code:

Given the following VHDL code: library fee: use leee.std_logic_1164.all; entity funcis port

library fee: use leee.std_logic_1164.all; entity funcis port in sed logic; b: in std logic; C: instd.logie: x out std. Logic; y : out std. Logic end entity func; architecture behavioral of tune is signal input : std_logic_vector(2 doute ); signal not_x : std_Logic: signal topy : std_Logic; begin input & & C with input select not x 'e' when "201", 'e' when "110". e' when 011", 'e' when "200" '1' when others; X (not not_x tnoy (nota and b) or (a and not b); y they end architecture behavioral; Analyze the code and fill in the table: a b y OOO 0 0 0 0 1 1 1 1 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 Which elementary Boolean function is realized by z ory? X: Y

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