In a computer system, assume that main memory accesses take $80$ ns and that memory accesses are one third of all instructions. The following table shows data for caches attached to each of two processors, P$1$ and P$2-$ A$.$ Assuming a base CP$|$ of $1\mathrm{.}0$ for both processors without any memory stalls, the total CP$|$ for P$1$ is Round the result with two digits after decimal points. $($total CP$|=$ base CP$|+$ data memory stall CP$|+$ instruction memory stall CPI$)$ B$.$ Total CP$|$ for P$2$ is $-$ Round the result with two digits after decimal points. $($total CP$|=$ base CP$|+$ data memory stall CP$|+$ instruction memory stall CPI$)$ C$.$ In order to increase the number of instructions being executed by $10\%,$ we add a second$-$level cache for P$1.$ If the second$-$level cache has $5$ns hit time, its miss rate must be percent. Round the result with two digits after decimal points.