Lab 6: Parity Generator In this experiment, you will use XOR gates to design a circuit which will generate an even parity bit for a 4-bit codeword. An even parity bit is combined with a 4-bit codeword to form a 5-bit codeword. The 5-bit codeword should have an even number of I's, as shown in the table below 4-bit Codeword Even Bit da da da I. Compute the following binary additions: a. 1+1 d. What is the least significant bit (LSB) of the addition results when you add i. ii. An even number of I's? An odd number of 1's? 2. An XOR gate can be used as a single-bit binary adder. The 7486 chip includes four 2- input XOR gates, as shown in Figure 1. Show the truth table of a 2-input XOR gate. Voc 4B 4A 4Y 3B 3A 3Y 2131456 1A 1B Y 2A 2B 2Y GND Figure 1:7486 Quad 2-input XOR gotes 3. Design a combinational circuit that will generate a parity bit p for a 4-bit codeword 4. 5. Implement both circuits on the breadboard and verify their operation. (dodd do). The circuit should be constructed using only 2-input XOR gates. (dddo XOR Adding one more XOR gate, expand the circuit so that it generates an odd parity q bit for