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6. A cache has the following parameters: b, block size given in numbers of words; S, number of sets; N, number of ways;and A, number of 2 address bits. A 16-word cache has the parameters given above. Consider the following repeating sequence of lw addresses (given in hexadecimal) and cache conigurations: 74 A0 78 38C AC 84 88 8C 7C 34 38 13C 388 18C The cache capacity is still 16 words. Assuming least recently used (LRU) replacement for associative caches, determine the efective miss rate if the sequence is input to the following caches, ignoring startup effects (i.e., compulsory misses) (1) two-way set associative cache, b = 2 words (2) direct mapped cache, b= 4 words