Suppose we have a new instruction, bmeq. We branch if the value in memory at the address in $rs equals the value in $rt. The instruction format is as follows:

bmeq ($rs) $rt offset

Use the datapath diagram provided as a reference for input and output names. Assume we are working with a non-pipelined single cycle datapath.

You are given a new control signal, BMEQ, which is 1 when it is a BMEQ instruction and 0 when it is not. In the following table, please fill in the inputs, control signal, and output destination for any additional MUXes you would need in order for this instruction to work correctly. You might not need all the lines

Inputs: ReadData1, ReadData2, ReadData, AluOut, MemoryData, PC

Output destinations: Addr, ReadReg1, ReadReg2, WriteAddr, InputA, InputB, ReadAddr, WriteData

Control Signal	Input0	Input1	Output Destination