There is a $64$ bytes two$-$way set associative data cache array where each cache block contains $8$ bytes on a $16-$ bit processor. Assume a true LRU replacement policy. Assume that the cache is initially empty $($all valid bits are zero$).$ Suppose we are accessing the memory locations in the order of $4,7,68,32,0,40,12,10$

M$,$ H$,$ M$,$ M$,$ M$,$ M$,$ M$,$ H

a$)$ How many index bits, offset bits, and tag bits are there?

b$)$ How many of these address requests are hits$/$misses$?$

c$)$ What is the hit ratio? $($Hint: you need to compute the number of sets first$)$

d$)$ How many blocks are replaced?