Question: Write the SystemVerilog code for the parameterized 2r-entry (m, n) correlating branch predictor The 2r-entry (m, n) correlating branch predictor has the following inputs: PC:

Write the SystemVerilog code for the parameterized 2r-entry (m, n) correlating branch predictor

The 2r-entry (m, n) correlating branch predictor has the following inputs: PC: 32-bit branch instruction address; Target: 32-bit target address; Result: actual branch result; Clk: clock signal. And the following outputs: Branch: predicted branch.

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