Operating Systems Internals and Design Principles 8th edition William Stallings - Solutions

List and briefly define the four main elements of a computer
Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock
Consider a computer system that contains an I/O module controlling a simple keyboard/printer Teletype. The following registers are contained in the CPU and connected directly to the system bus:INPR:
In virtually all systems that include DMA modules, DMA access to main memory is given higher priority than processor access to main memory. Why?
A DMA module is transferring characters to main memory from an external device transmitting at 9600 bits per second (bps). The processor can fetch instructions at the rate of 1 million instructions
A computer consists of a CPU and an I/O device D connected to main memory M via a shared bus with a data bus width of one word. The CPU can execute a maximum of 106 instructions per second. An
Generalize Equations (1.1) and (1.2) in Appendix 1A to n-level memory hierarchies.
Consider a memory system with the following parameters: Tc = 100 ns Cc = 0.01 cents > bit Tm = 1,200 ns Cm = 0.001 cents > bit a. What is the cost of 1 MByte of main memory? b. What is the cost of
A computer has a cache, main memory, and a disk used for virtual memory. If a referenced word is in the cache, 20 ns are required to access it. If it is in main memory but not in the cache, 60 ns are
Suppose a stack is to be used by the processor to manage procedure calls and returns. Can the program counter be eliminated by using the top of the stack as a program counter?
Define the two main categories of processor registers.
In general terms, what are the four distinct actions that a machine instruction can specify?
How are multiple interrupts dealt with?
In general, what are the strategies for exploiting spatial locality and temporal locality?
Suppose the hypothetical processor of Figure 1.3 also has two I/O instructions:0011 = Load AC from I/O0111 = Store AC to I/OIn these cases, the 12-bit address identifies a particular external device.
The program execution of Figure is described in the text using six steps. Expand this description to show the use of the MAR and MBR.
Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two fields. The first byte contains the op-code and the remainder an immediate operand or an operand address.a.
Consider a hypothetical microprocessor generating a 16-bit address (e.g., assume that the program counter and the address registers are 16 bits wide) and having a 16-bit data bus.a. What is the
What are three objectives of an OS design?
What is the kernel of an OS?
How is the execution context of a process used by the OS?
List and briefly explain five storage management responsibilities of a typical OS.
Describe the round-robin scheduling technique.
Explain the difference between a monolithic kernel and a microkernel.
Suppose that we have a multi-programmed computer in which each job has identical characteristics. In one computation period, T, for a job, half the time is spent in I/O and the other half in
An I/O-bound program is one that, if run alone, would spend more time waiting for I/O than using the processor. A processor-bound program is the opposite. Suppose a short-term scheduling algorithm
Contrast the scheduling policies you might use when trying to optimize a time-sharing system with those you would use to optimize a multi-programmed batch system.
In IBM’s mainframe OS, OS/390, one of the major modules in the kernel is the System Resource Manager. This module is responsible for the allocation of resources among address spaces (processes).
A multiprocessor with eight processors has 20 attached tape drives. There is a large number of jobs submitted to the system that each require a maximum of four tape drives to complete execution.
For the processing model of Figure, briefly define each state.
What is swapping and what is its purpose?
Why does Figure have two blocked states?
List four characteristics of a suspended process.
Why are two modes (user and kernel) needed?
What are the steps performed by an OS to create a new process?
What is the difference between an interrupt and a trap?
What is the difference between a mode switch and a process switch?
The following state transition table is a simplified model of process management, with the labels representing transitions between states of READY, RUN, BLOCKED, and NONRESIDENT.Give an example of an
Assume that at time 5 no system resources are being used except for the processor and memory. Now consider the following events: At time 5: P1 executes a command to read from disk unit 3. At time 15:
Figure 3.9b contains seven states. In principle, one could draw a transition between any two states, for a total of 42 different transitions.a. List all of the possible transitions and give an
For the seven-state process model of Figure, draw a queuing diagram similar to that of Figure 3.8b.
Consider the state transition diagram of Figure.Suppose that it is time for the OS to dispatch a process and that there are processes in both the Ready state and the Ready/Suspend state, and that at
Table shows the process states for the VAX/VMS operating system.a. Can you provide a justification for the existence of so many distinct wait states?b. Why do the following states not have resident
The VAX/VMS operating system makes use of four processor access modes to facilitate the protection and sharing of system resources among processes. The access mode determines• Instruction execution
The VMS scheme discussed in the preceding problem is often referred to as a ring protection structure, as illustrated in Figure. Indeed, the simple kernel/user scheme, as described in Section 3.3, is
Figure suggests that a process can only be in one event queue at a time.a. Is it possible that you would want to allow a process to wait on more than one event at the same time? Provide an example.b.
In a number of early computers, an interrupt caused the register values to be stored in fixed locations associated with the given interrupt signal. Under what circumstances is this practical
Table lists typical elements found in a process control block for an unthreaded OS. Of these, which should belong to a thread control block and which should belong to a process control block for a
List three advantages of ULTs over KLTs.
List two disadvantages of ULTs compared to KLTs.
OS/2 is an obsolete OS for PCs from IBM. In OS/2, what is commonly embodied in the concept of process in other operating systems is split into three separate types of entities: session, processes,
Consider an environment in which there is a one-to-one mapping between user-level threads and kernel-level threads that allows one or more threads within a process to issue blocking system calls
Many current language specifications, such as for C and C++, are inadequate for multithreaded programs. This can have an impact on compilers and the correctness of code, as this problem illustrates.
But some existing optimizing compilers (including gcc, which tends to be relatively conservative) will “optimize” count_positives to something similar to void count_positives(list l) { list
Consider the following code using the POSIX Pthreads API:thread2.c#include#include#include#includeint myglobal;void *thread_function(void *arg) {int i,j;for ( i=0; i<20; i++ )
The Solaris documentation states that a ULT may yield to another thread of the same priority. Isn’t it possible that there will be a run able thread of higher priority and that therefore the yield
In Solaris 9 and Solaris 10, there is a one-to-one mapping between ULTs and LWPs. In Solaris 8, a single LWP supports one or more ULTs.a. What is the possible benefit of allowing a many-to-one
Explain the rationale for the Uninterruptible state in Linux.
List three degrees of awareness between processes and briefly define each.
What is the distinction between competing processes and cooperating processes?
List the three control problems associated with competing processes and briefly define each.
List the requirements for mutual exclusion.
What operations can be performed on a semaphore?
What is the distinction between blocking and non-blocking with respect to messages?
Consider the following program:Note that the scheduler in a uniprocessor system would implement pseudo parallel execution of these two concurrent processes by interleaving their instructions, without
Consider the following program:const int n = 50;int tally;void total(){int count;for (count = 1; count<= n; count++){tally++;}}void main(){tally = 0;parbegin (total (), total ());write (tally);}a.
Is busy waiting always less efficient (in terms of using processor time) than a blocking wait? Explain.
Consider the following program: boolean blocked [2]; int turn; void P (int id) { while (true) { blocked[id] = true; while (turn != id) { while (blocked[1-id]) /* do nothing */;
A software approach to mutual exclusion is Lamport’s bakery algorithm [LAMP74], so called because it is based on the practice in bakeries and other shops in which every customer receives a numbered
Now consider a version of the bakery algorithm without the variable choosing. Then we have 1 int number[n]; 2 while (true) { 3 number[i] = 1 + getmax(number[], n); 4 for (int j = 0; j < n;
Consider the following program which provides a software approach to mutual exclusion:Integer array control [1: N]; integer kWhere 1 ≤ k ≤ N, and each element of “control” is either 0, 1, Or
When a special machine instruction is used to provide mutual exclusion in the fashion of Figure 5.2, there is no control over how long a process must wait before being granted access to its critical
Consider the following definition of semaphores: void semWait(s) { if (s.count > 0) { s.count--; } else { place this process in s.queue; block; } } void semSignal (s) {
Consider a sharable resource with the following characteristics: (1) As long as there are fewer than three processes using the resource, new processes can start using it right away. (2)
It should be possible to implement general semaphores using binary semaphores. We can use the operations semWaitB and semSignalB and two binary semaphores, delay and mutex. Consider the
In the commentary on Figure 5.9 and Table 5.4, it was stated that “it would not do simply to move the conditional statement inside the critical section (controlled by s) of the consumer because
The following pseudocode is a correct implementation of the producer/consumer problem with a bounded buffer:Labels p1, p2, p3 and c1, c2, c3 refer to the lines of code shown above (p2 and c2 each
This problem demonstrates the use of semaphores to coordinate three types of processes.6 Santa Claus sleeps in his shop at the North Pole and can only be awakened by either (1) all nine reindeer
Show that message passing and semaphores have equivalent functionality bya. Implementing message passing using semaphores.b. Implementing a semaphore using message passing.
Explain what is the problem with this implementation of the one-writer many-readers problem?
A pipeline algorithm is implemented so that a stream of data elements of type T produced by a process P0 passes through a sequence of processes P1, P2, ., Pn - 1, which operates on the elements in
Suppose the following two processes, foo and bar, are executed concurrently and share the semaphore variables S and R (each initialized to 1) and the integer variable x (initialized to 0).a. Can the
Consider a system consisting of four processes and a single resource. The current state of the claim and allocation matrices is:What is the minimum number of units of the resource needed to be
Consider the following ways of handling deadlock: (1) Banker’s algorithm, (2) Detect deadlock and kill thread, releasing all resources, (3) Reserve all resources in advance, (4) Restart thread
Suppose that there are two types of philosophers. One type always picks up his left fork first (a €œlefty€), and the other type always picks up his right fork first (a €œrighty€). The
The two variables a and b have initial values of 1 and 2, respectively. The following code is for a Linux system:What possible errors are avoided by the use of the memory barriers?
What are the three conditions that must be present for deadlock to be possible?
List two ways in which the no-preemption condition can be prevented.
What is the difference among deadlock avoidance, detection, and prevention?
Show that the four conditions of deadlock apply to Figure.
Show how each of the techniques of prevention, avoidance, and detection can be applied to Figure.
For Figure, provide a narrative description of each of the six depicted paths, similar to the description of the paths of Figure 6.2 provided in Section 6.1.
It was stated that deadlock cannot occur for the situation reflected in Figure. Justify that statement.
Given the following state for the Banker’s Algorithm. 6 processes P0 through P54 resource types: A (15 instances); B (6 instances)C (9 instances); D (10 instances)Snapshot at time T0:a. Verify
In the code below, three processes are competing for six resources labeled A to F.a. Using a resource allocation graph, show the possibility of a deadlock in this implementation.b. Modify the order
A spooling system consists of an input process I, a user process P, and an output process O connected by two buffers. The processes exchange data in blocks of equal size. These blocks are buffered on
Suggest an additional resource constraint that will prevent the deadlock in Problem 6.7 but still permit the boundary between input and output buffers to vary in accordance with the present needs of
In the THE multiprogramming system [DIJK68], a drum (precursor to the disk for secondary storage) is divided into input buffers, processing areas, and output buffers, with floating boundaries,
In the THE multiprogramming system, a page can make the following state transitions:1. Empty S input buffer ……………………
Consider a system with a total of 150 units of memory, allocated to three processes as shown:Apply the banker's algorithm to determine whether it would be safe to grant each of the following

Showing 1 - 100 of 1171

Operating Systems Internals and Design Principles 8th edition William Stallings - Solutions

Step by Step Answers