A processor takes one clock cycle to execute each instruction, when no memory stalls are present. Its one level cache has a miss rate of 3% and the main memory takes 504 clock cycles to be accessed. The CPI taking into account the memory stall cycles, assuming 1.56 accesses to memory per instruction is A processor takes one clock cycle to execute each instruction, when no memory stalls are present. Its one level cache has a miss rate of 5% and the main memory takes 875 clock cycles to be accessed. The CPI taking into account the memory stall cycles, assuming 1.96 accesses to memory per instruction is A processor takes one clock cycle to execute each instruction, when no memory stalls are present. Its one level cache has a miss rate of 12% and the main memory takes 393 clock cycles to be accessed. The CPI taking into account the memory stall cycles, assuming 1.35 accesses to memory per instruction is