Question: Assume that logic blocks needed to implement a processor's datapath have the following latencies. If the only thing we need to do in a processor

Assume that logic blocks needed to implement a processor's datapath have the following latencies. If the only thing we need to do in a processor is fetch consecutive instructions, see datapath figure below, what would be the cycle time be? Now consider a datapath similar to the one shown below, but for a processor that only has one type of instructions: unconditional PC-relative branch. What would be the cycle time be for this datapath

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