Question: Assuming the logic blocks need to implement a processors datapath as in question 1 with the following latencies and configuration: a. If the only thing

Assuming the logic blocks need to implement a processors datapath as

Assuming the logic blocks need to implement a processors datapath as in question 1 with the following latencies and configuration: a. If the only thing we need to do in a processor is to perform a "beq" instructions. What would the cycle time be? (2%) b. What should the critical path be with such datapath if the processor only needs to perform add, sub, beq, and jump? (2%) Assuming the logic blocks need to implement a processors datapath as in question 1 with the following latencies and configuration: a. If the only thing we need to do in a processor is to perform a "beq" instructions. What would the cycle time be? (2%) b. What should the critical path be with such datapath if the processor only needs to perform add, sub, beq, and jump? (2%)

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