Part $1$

Consider the following Single$-$cycle Datapath. This exercise refers to a clock cycle in which the processor fetches the following instruction word: $0$xadac$0014.$

For context: The encoded instruction is sw $\backslash$$t$4,20(\backslash$$t$5)$

a$)$ What are the values of the ALU control unit's inputs for this instruction?

b$)$ What is the new PC address after this instruction is executed? Highlight the path through which this value is determined.

c$)$ For each mux, show the values of its inputs and outputs during the execution of this instruction. List values that are register outputs at Reg $[$xn$]$

d$)$ What are the input values for the ALU and the two add units?

e$)$ What are the values of all inputs for the register's unit?