Write the VHDL for a 4-bit up/down counter that does not overflow or underflow. When the count reaches its maximum value it remains at that value if the count mode is up. When the count reaches zero, it remains zero if the count mode is down. Use a control input named U_D to control the direction of the count (1 means count up and 0 means count down). Remember all counters have a clock and reset as well. Submit your code