Let A = A(1), A(2), . . . , A(1000) and B = B(1), B(2), . . . , B(1000) be two vectors (one-dimensional arrays) comprising 1000 numbers each that are to be added to form an array C such that C(I) =...

Given the memory contents of the IAS computer shown below, Address Contents 08A .......... 010FA210FB 08B .......... 010FA0F08D 08C .......... 020FA210FB show the assembly language code for the...

You must have completed Exercise 10 in Chapter 10 for beginning this exercise and thus have used the SQL Data Definition Language to create tables for the three relations DRIVER, TICKET_TYPE, and...

With reference to Table 2.4, we see that the relative performance of the IBM 360 Model 75 is 50 times that of the 360 Model 30, yet the instruction cycle time is only 5 times as fast. How do you...

Assume the following performance characteristics on a cache read miss: one clock cycle to send an address to main memory and four clock cycles to access a 32-bit word from main memory and transfer it...

The performance of a single-level cache system for a read operation can be characterized by the following equation: Ta = Tc + (1 - H)Tm where Ta is the average access time, Tc is the cache access...

List the following values: a. For the direct cache example of Figure 4.10: address length, number of addressable units, block size, number of blocks in main memory, number of lines in cache, size of...

What are two senses in which the term random-access memory is used?

For the 8-bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101.What is the data word that was read from...

The memory of a particular microcomputer is built from 64K 1 DRAMs. According to the data sheet, the cell array of the DRAM is organized into 256 rows. Each row must be refreshed at least once every...

Figure 5.17 shows one of the early SRAMs, the 16 Ã 4 Signetics 7489 chip, which stores 16 4-bit words. a. List the mode of operation of the chip for each input pulse shown in Figure 5.17c. b....

A microprocessor scans the status of an output I/O device every 20 ms. This is accomplished by means of a timer alerting the processor every 20 ms. The interface of the device includes two ports: one...

An I/O-bound program is one that, if run alone, would spend more time waiting for I/O than using the processor. A processor-bound program is the opposite. Suppose a short-term scheduling algorithm...

Draw a figure similar to Figure 8.23 for ARM virtual memory translation when main memory is divided into sections. Virtual address 31 19 11 L2 page Ll index index inde Level 1L1) page table Main...

A program computes the row sums of an array A that is 100 by 100. Assume that the computer uses demand paging with a page size of 1000 words, and that the amount of main memory allotted for data is...

Consider a dynamic partitioning scheme. Show that, on average, the memory contains half as many holes as segments. Discuss.

Give reasons that the page size in a virtual memory system should be neither very small nor very large.

Represent the following decimal numbers in both binary sign/magnitude and twos complement using 16 bits: +512; -29.

The following numbers use the IEEE 32-bit floating-point format. What is the equivalent decimal value? a. 1 10000011 11000000000000000000000 b. 0 01111110 10100000000000000000000 c. 0 10000000...

Consider a reduced 7-bit IEEE floating-point format, with 3 bits for the exponent and 3 bits for the significand. List all 127 values.

One of the most serious errors in computer calculations occurs when two nearly equal numbers are subtracted. Consider A = 0.22288 and B = 0.22211. The computer truncates all values to four decimal...

Show how the following floating-point subtractions are performed (where significands are truncated to 4 decimal digits). Show the results in normalized form. a. 7.744 10-3 - 6.666 10-3 b. 8.844 ...

Show how the following floating-point calculations are performed (where significands are truncated to 4 decimal digits). Show the results in normalized form. a. (2.255 101) (1.234 100) b. (8.833 ...

The x86 architecture includes an instruction called Decimal Adjust after Addition (DAA).DAA performs the following sequence of instructions: if ((AL AND 0FH) >9) OR (AF = 1) then AL AL + 6; AF 1;...

Many microprocessor instruction sets include an instruction that tests a condition and sets a destination operand if the condition is true. Examples include the SETcc on the x86, the Scc on the...

Using the algorithm for converting infix to postfix defined in Appendix 10A, show the steps involved in converting the expression of Figure 10.15 into postfix. Use a presentation similar to Figure...

The tens complement of the decimal number X is defined to be 10N - X, where N is the number of decimal digits in the number. Describe the use of ten's complement representation to perform decimal...

Consider the results of Problem 10.6. Assume that M is a 16-bit memory address and that X, Y, and Z are either 16-bit addresses or 4-bit register numbers. The one-address machine uses an accumulator,...

Let the address stored in the program counter be designated by the symbol X1. The instruction stored in X1 has an address part (operand reference) X2. The operand needed to execute the instruction is...

The 16-bit Zilog Z8001 has the following general instruction format: The mode field specifies how to locate the operands from the operand fields. The w/b field is used in certain instructions to...

A PC-relative mode branch instruction is 3 bytes long. The address of the instruction, in decimal, is 256028. Determine the branch target address if the signed displacement in the instruction is -31.

The Motorola 680x0 machines include the instruction Decrement and Branch According to Condition, which has the following form: DBcc Dn, displacement where cc is one of the testable conditions, Dn is...

Redraw Figures 12.19c, assuming that the conditional branch is not taken. Figure 12.19 Branch Prediction State Diagram Not taken Predict taken Predict taken Taken Taken Not takern Not takern Predict...

Table 12.5 summarizes statistics from [MACD84] concerning branch behavior for various classes of applications. With the exception of type 1 branch behavior, there is no noticeable difference among...

Assume an 8088 is executing a program in which the probability of a program jump is 0.1. For simplicity, assume that all instructions are 2 bytes long. a. What fraction of instruction fetch bus...

A pipelined processor has a clock rate of 2.5 GHz and executes a program with 1.5 million instructions. The pipeline has five stages, and instructions are issued at a rate of one per clock cycle....

Considering the call-return pattern, how many overflows and underflows (each of which causes a register save/restore) will occur with a window size of a. 5? b. 8? c. 16?

Reorganize the code sequence in Figure 13.6d to reduce the number of NOOPs. Figure 13.6d Load rA(--M Load rBM NOOP NOOP | |E.E. I EE IEE Store MrC Branch X NOOP NOOP IEIE IE E

Consider the following loop: S: = 0; for K: = 1 to 100 do S: = S - K; A straightforward translation of this into a generic assembly language would look something like this: A compiler for a RISC...

In many cases, common machine instructions that are not listed as part of the MIPS instruction set can be synthesized with a single MIPS instruction. Show this for the following: a....

What are the key elements of a superscalar processor organization?

Your ALU can add its two input registers, and it can logically complement the bits of either input register, but it cannot subtract. Numbers are to be stored in two's complement representation. List...

List and briefly define three types of computer system organization.

What are the chief characteristics of an SMP?

What are some of the potential advantages of an SMP compared with a uniprocessor?

What are some of the key OS design issues for an SMP?

What is the difference between software and hardware cache coherent schemes?

Consider the control unit of Figure 16.7. Assume that the control memory is 24 bits wide. The control portion of the microinstruction format is divided into two fields. A micro operation field of 13...

What is the meaning of each of the four states in the MESI protocol?

What are some of the key benefits of clustering?

What is the difference between failover and failback?

What are the differences among UMA, NUMA, and CC-NUMA?

Some of the diagrams show horizontal rows that are partially filled. In other cases, there are rows that are completely blank. These represent two different types of loss of efficiency. Explain.

The following FORTRAN program is to be executed on a computer, and a parallel version is to be executed on a 32-computer cluster. Suppose lines 2 and 4 each take two machine cycle times, including...

Consider a situation in which two processors in an SMP configuration, over time, require access to the same line of data from main memory. Both processors have a cache and use the MESI protocol....

Consider Figure 20.20. Assume that each gate produces a delay of 10 ns. Thus, the sum output is valid after 30 ns and the carry output after 0 ns. What is the total add time for a. 32-bit adder a....

Construct a truth table for the following Boolean expressions: a. b. c. d. ABC A BC ABC ABC A B C A(BC + BC) (A +B)(A C)(A B)

A combinational circuit is used to control a seven-segment display of decimal digits, as shown in Figure 20.36. The circuit has four inputs, which provide the four-bit code used in packed decimal...

Describe the effect of this instruction: cmp eax, 1 Assume that the immediately preceding instruction updated the contents of eax.

How much time does your employer give you to read about current events related to your job?

How does reading current news articles help IT security professionals in their daily jobs?

Brute force is used to crack a 100-bit key. The key is cracked in only 5,000 tries. How can this be?

In practice, public key authentication is used heavily for initial authentication but rarely for message-by-message authentication. Given the intense processing power required for public key...

Can you use the longest hash possible? How long is good enough?

How will diverse computing platforms affect IT security?

a) What can users do to enhance browser security? b) Under Internet Options in IE, what can the user do on the Security tab? d) In which tab are cookies controlled?

An employee working at home complains that some of her messages to fellow employees at the firm's headquarters site are not getting through. What might be the problem?

a) What is Data Loss Prevention (DLP)? b) Are there some types of data that are too risky to collect? c) What is PII? Please give a couple examples of PII. d) What is data masking?

How much data would you lose if your computer's hard drive crashed right now? Could you reduce the amount of data that would be lost? How?

How might a corporation be hurt by acknowledging a large-scale data loss?

a) What is the major attraction of a HIDS? b) What are the two weaknesses of host IDSs? c) List some things at which host operating system monitors look?

When IDSs generate alerts, it can send them to a console in the security center, to a mobile phone, or via e-mail. Discuss the pros and cons of each?

Consider the following relations for a database that keeps track of business trips of salespersons in a sales office: SALESPERSON (SSN, Name, Start_Year, Dept_No) TRIP (SSN, From_City, To_City,...

Write appropriate SQL DDL statements for declaring the LIBRARY relational database schema of Figure 4.6. Specify the keys and referential triggered actions.

Specify the following queries in SQL on the database schema of Figure 1.2. (a) Retrieve the names of all senior students majoring in 'COSC' (computer science). (b) Retrieve the names of all courses...

In SQL, specify the following queries on the database specified in Figure 3.5 using the concept of nested queries and the concepts described in this chapter. a. Retrieve the names of all employees...

Show the result of each of the sample queries in Section 6.5 as it would apply to the database state in Figure 3.6.

Consider the two tables T1 and T2 shown in Figure 6.15. Show the results of the following operations:

Show an alternative design for the attribute described in Exercise 7.17 that uses only entity types (including weak entity types if needed) and relationship types.

A database is being constructed to keep track of the teams and games of a sports league. A team has a number of players, not all of whom participate in each game. It is desired to keep track of the...

Cardinality ratios often dictate the detailed design of a database. The cardinality ratio depends on the real-world meaning of the entity types involved and is defined by the specific application....

Convert the example of GEOMETRY_OBJECTS given in section 11.1.5 from the functional notation to the notation given in Figure 11.2 that distinguishes between attributes and operations. Use the keyword...

Compare inheritance in the EER model (see Chapter 8) to inheritance in the OO model described in Section 11.1.5.

Show two rules that have a confidence of 0.7 or greater for an itemset containing three items from Exercise 28.14.

Repeat exercise 15.24 for the following different set of functional dependencies G = { {A, B} -> {C}, {B, D} -> {E, F}, {A, D} -> {G, H}, {A} -> {I}, {H} -> {J} }.

Consider the relation REFRIG(MODEL#, YEAR, PRICE, MANUF_PLANT, COLOR), which is abbreviated as REFRIG(M, Y, P, MP, C), and the following set of F of functional dependencies: F={M -> MP, {M,Y} -> P,...

A PARTS file with Part# as hash key includes records with the following Part# values: 2369, 3760, 4692, 4871, 5659, 1821, 1074, 7115, 1620, 2428, 3943, 4750, 6975, 4981, 9208. The file uses 8...

Prove that cautious waiting avoids deadlock.

Apply the timestamp ordering algorithm to the schedules of Figure 21.8 (b) and (c), and determine whether the algorithm will allow the execution of the schedules.

Repeat Exercise 22.25, but use the multiversion timestamp ordering method.

Describe the most popular wireless Internet access technologies today. Compare and contrast them.

List six access technologies. Classify each one as residential access, company access, or mobile access.

In the above problem, suppose R1 =R2 =R3 =R and dproc = 0. Further suppose the packet switch does not store-and-forward packets but instead immediately transmits each bit it receives before waiting...

Suppose you can access the caches in the local DNS servers of your department. Can you propose a way to roughly determine the Web servers (outside your department) that are most popular among the...

Assume that we know the bottleneck link along the path from the server to the client is the first link with rate R, bits/sec. Suppose we send a pair of packets back to back from the server to the...

Suppose two hosts, A and B, are separated by 20,000 kilometers and are connected by a direct link of R = 2 Mbps. Suppose the propagation speed over the link is 2.5.108 meters/sec. a. Calculate the...

Referring to problem P24, suppose we can modify R. For what value of R is the width of a bit as long as the length of the link? Problem 24 Suppose two hosts, A and B, are separated by 20,000...

Consider distributing a file of F = 15 Gbits to N peers. The server has an upload rate of s, = 30 Mbps, and each peer has a download rate of di =2 Mbps and an upload rate of . For N =10, 100, and...

In the generic SR protocol that we studied in Section 3.4.4, the sender transmits a message as soon as it is available (if it is in the window) without waiting for an acknowledgment. Suppose now that...

Consider the foll owing string of ASCll characters that were captured by Wireshark when the browser sent an HTTP GET message (i .e., this is the actual content of an HTTPGET message). The characters...