Question: For the programmable logic block shown in Figure 5-13, what functions should be entered into the 2-LUTs to implement a 1-bit 2s complement subtractor performing

For the programmable logic block shown in Figure 5-13, what functions should be entered into the 2-LUTs to implement a 1-bit 2s complement subtractor performing the operation a - b?

Figure 5-13

b 2-LUT 1 2 2-LUT MUX2 18 MUXI carry_in sum addition logic carry_out MUX3 DQ clock www MUX4 out 10

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