Question: Given the following MIPS assembly like code: Li R 8 , 8 L: , LW R 2 , R 3 , R 7 Add R

Given the following MIPS assembly like code:
Li R8,8
L: , LW R2, R3, R7
Add R1, R2, R3
Sub R7, R1, R3
LW R4,10(R7)
SWR4,20(R1)
Subi R8, R8,4
BNEQZ R8, L
Also, given the following latencies for each stage:
IF: 80ns, ID: 30 ns, EX: 50 ns, MEM: 85n, and WB: 35 ns
What is the average CPI when running this code on Multi-cycle MIPS CPU with the above latencies?
A.4.133
B. None of the answers
C.4.125
D.4,40
E.4.00
 Given the following MIPS assembly like code: Li R8,8 L: ,

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