Question: Given the following MIPS assembly like code: Li R 8 , 8 L: Lw R 2 , R 3 , R 7 Add R I,

Given the following MIPS assembly like code: Li R8,8 L: Lw R2, R3, R7 Add R I, R2, R3 Sub R7, R1, R3 Lw R4,10(R7) Sw R4,20(R1) Subi R8, R8,4 BNEQZ R8, L
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Also, given the following latencies for each stage: IF: 8Ons, ID: 3Ons, EX: 5Ons, MEM: 85ns, and WB: 35ns What is the total execution time when running this code on Multi-cycle MIPS CPU with the above latencies?

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