Given the following MIPS assembly like code:

If $P8,8$

L: $,$ LW $R2,R3,R7$

Add R$1,$ R$2,$ R$3$

Sub R$7,$ R$1,$ R$3$

LW R$4,10($R$7)$

SW R$4,20($R$-1)$

Subi R$8,$ R$8,4$

BNEQZ R$8,$ L

Also, given the following latencies for each stage:

IF: $80n,$ ID: $30n,$ EX: $50n,$ MFM: $85ns,$ and WB: $35ns$

What is the totalnumber of cycles needed when running this code on a MIPS Pipelined CPU with the using of full data forwarding and the branch resolved in the $10$ Stage and initiolized to be Iaken. Ignore inifial pipeline fill cycles.

A$.30$

B$.18$

C$.16$

D$.17$

E$.32$