All Matches

Solution Library

Expert Answer

Textbooks

Search Textbook questions, tutors and Books

Oops, something went wrong!

Change your search query and then try again

Result Not Found

Books FREE
Tutors
Study Help
Ask a Question

Search
Sign In
Register

study help
computer science
computer organization design

Questions and Answers of Computer Organization Design

Calculate the time necessary to perform a multiply using the approach given in Figure 3.7 if an integer is 8 bits wide and an adder takes 4 time units.Figure 3.7 Mplier31 • Mcand Mplier30 • Mcand
Calculate the time necessary to perform a multiply using the approach described in the text (31 adders stacked vertically) if an integer is 8 bits wide and an adder takes 4 time units.
Calculate the time necessary to perform a multiply using the approach given in Figures 3.3 and 3.4 if an integer is 8 bits wide and each step of the operation takes 4 time units. Assume that in step
Using a table similar to that shown in Figure 3.6, calculate the product of the hexadecimal unsigned 8-bit integers 62 and 12 using the hardware described in Figure 3.5. You should show the contents
Using a table similar to that shown in Figure 3.6, calculate the product of the octal unsigned 6-bit integers 62 and 12 using the hardware described in Figure 3.3. You should show the contents of
Assume 151 and 214 are signed 8-bit decimal integers stored in two’s complement format. Calculate 151 + 214 using saturating arithmetic. The result should be written in decimal. Show your work.
Assume 185 and 122 are signed 8-bit decimal integers stored in sign-magnitude format. Calculate 185 - 122. Is there overflow, underflow, or neither?
Assume 185 and 122 are signed 8-bit decimal integers stored in sign-magnitude format. Calculate 185 + 122. Is there overflow, underflow, or neither?
Assume 185 and 122 are unsigned 8-bit decimal integers. Calculate 185 – 122. Is there overflow, underflow, or neither?
What is 4365 - 3412 when these values represent signed 12-bit octal numbers stored in sign-magnitude format? The result should be written in octal. Show your work.
Convert 5ED4 into a binary number. What makes base 16 (hexadecimal) an attractive numbering system for representing values in computers?
Assume for a given processor the CPI of arithmetic instructions is 1, the CPI of load/store instructions is 10, and the CPI of branch instructions is 3. Assume a program has the following instruction
Using your code from Exercise 2.43 as an example, explain what happens when two processors begin to execute this critical section at the same time, assuming that each processor executes exactly one
If the current value of the PC is 0x1FFFf000, can you use a single branch instruction to get to the PC address as shown in Exercise 2.39?Exercise 2.39Write the MIPS assembly code that creates the
If the current value of the PC is 0x00000600, can you use a single branch instruction to get to the PC address as shown in Exercise 2.39?Exercise 2.39Write the MIPS assembly code that creates the
If the current value of the PC is 0x00000000, can you use a single jump instruction to get to the PC address as shown in Exercise 2.39?Exercise 2.39Write the MIPS assembly code that creates the
Write the MIPS assembly code that creates the 32-bit constant 0010 0000 0000 0001 0100 1001 0010 0100two and stores that value to register $t1.
Consider the following code:Assume that the register $t1 contains the address 0x1000 0000 and the register $t2 contains the address 0x1000 0010. Note the MIPS architecture utilizes big-endian
Right before your function f from Exercise 2.34 returns, what do we know about contents of registers $t5, $s3, $ra, and $sp? Keep in mind that we know what the entire function f looks like, but for
Can we use the tail-call optimization in this function? If no, explain why not. If yes, what is the difference in the number of executed instructions in f with and without the optimization?
Functions can oft en be implemented by compilers “in-line.” An in-line function is when the body of the function is copied into the program space, allowing the overhead of the function call to be
Implement the following C code in MIPS assembly. What is the total number of MIPS instructions needed to execute the function int fib(int n){ if (n==0) return 0; else if (n 1) == return 1; else
Translate the following loop into C. Assume that the C-level integer i is held in register $t1, $s2 holds the C-level integer called result, and $s0 holds the base address of the integer MemArray.
How many MIPS instructions does it take to implement the C code from Exercise 2.27? If the variables a and b are initialized to 10 and 1 and all elements of D are initially 0, what is the total
Consider the following MIPS loop:1. Assume that the register $t1 is initialized to the value 10. What is the value in register $s2 assuming $s2 is initially zero?2. For each of the loops above, write
The following instruction is not included in the MIPS instruction set:rpt $t2, loop # if(R[rs]>0) R[rs]=R[rs]−1, PC=PC+4+BranchAddr1. If this instruction were to be implemented in the MIPS
Assume the following register contents:$t0 = 0xAAAAAAAA, $t1 = 0x123456781. [5] <§2.6> For the register values shown above, what is the value of $t2 for the following sequence of
Suppose the program counter (PC) is set to 0x2000 0000. Is it possible to use the jump (j) MIPS assembly instruction to set the PC to the address as 0x4000 0000? Is it possible to use the
Assume $t0 holds the value 0x00101000. What is the value of $t2 aft er the following instructions? $t2, $0, slt $t0 bne $t2, $0, ELSE DONE ELSE: addi $t2, $t2, 2 DONE:
For the following C statement, write a minimal sequence of MIPS assembly instructions that does the identical operation. Assume $t1 = A, $t2 = B, and $s1 is the base address of C.A = C[0] << 4;
Provide a minimal set of MIPS instructions that may be used to implement the following pseudoinstruction:not $t1, $t2 // bit-wise invert
Find the shortest sequence of MIPS instructions that extracts bits 16 down to 11 from register $t0 and uses the value of this field to replace bits 31 down to 26 in register $t1 without changing the
Assume that we would like to expand the MIPS register file to 128 registers and expand the instruction set to contain four times as many instructions.1. How this would this affect the size of each of
Provide the type, assembly language instruction, and binary representation of instruction described by the following MIPS fields:op = 0 x 23, rs = 1, rt = 2, const = 0 x 4
Provide the type, assembly language instruction, and binary representation of instruction described by the following MIPS fields:op = 0, rs = 3, rt = 2, rd = 3, shamt = 0, funct = 34
Provide the type and hexadecimal representation of following instruction: sw $t1, 32($t2)
Provide the type and assembly language instruction for the following binary value: 0000 0010 0001 0000 1000 0000 0010 0000two.
Assume that $s0 holds the value 128ten.1. For the instruction add $t0, $s0, $s1, what is the range(s) of values for $s1 that would result in overflow?2. For the instruction sub $t0, $s0, $s1, what is
Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively.1. What is the value of $t0 for the following assembly code? add $t0, $s0, $s12. Is the result in $t0 the
Translate the following MIPS code to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A
For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, and i are given and could be considered 32-bit integers as declared in a C program. Use
For the MIPS assembly instructions below, what is the corresponding C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively.
For the following MIPS assembly instructions above, what is a corresponding C statement?add f, g, hadd f, i, f
Th e table below shows 32-bit values of an array stored in memory.Address .............Data24 ..........................238 ..........................432 ..........................336
For the MIPS assembly instructions in Exercise 2.4, rewrite the assembly code to minimize the number if MIPS instructions (if possible) needed to carry out the same function.Exercise 2.4For the MIPS
For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume
Aside from the smart cell phones used by a billion people, list and describe four other types of computers.
Another pitfall cited in Section 1.10 is expecting to improve the overall performance of a computer by improving only one aspect of the computer. Consider a computer running a program that requires
Th e eight great ideas in computer architecture are similar to ideas from other fields. Match the eight ideas from computer architecture, “Design for Moore’s Law”, “Use Abstraction to
Describe the steps that transform a program written in a high-level language such as C into a representation that is directly executed by a computer processor.
Assume a color display using 8 bits for each of the primary colors (red, green, blue) per pixel and a frame size of 1280 × 1024.a. What is the minimum size in bytes of the frame buff er to store a
Consider three diff erent processors P1, P2, and P3 executing the same instruction set. P1 has a 3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz
Consider two different implementations of the same instruction set architecture. Th e instructions can be divided into four classes according to their CPI (class A, B, C, and D). P1 with a clock rate
Compilers can have a profound impact on the performance of an application. Assume that for a program, compiler A results in a dynamic instruction count of 1.0E9 and has an execution time of 1.1 s,
Th e Pentium 4 Prescott processor, released in 2004, had a clock rate of 3.6 GHz and voltage of 1.25 V. Assume that, on average, it consumed 10 W of static power and 90 W of dynamic power.The Core i5
Assume for arithmetic, load/store, and branch instructions, a processor has CP Is of 1, 12, and 5, respectively. Also assume that on a single processor a program requires the execution of 2.56E9
Assume a 15 cm diameter wafer has a cost of 12, contains 84 dies, and has 0.020 defects/cm2. Assume a 20 cm diameter wafer has a cost of 15, contains 100 dies, and has 0.031 defects/cm2.1. Find the
The results of the SPEC CPU 2006 bzip2 benchmark running on an AMD Barcelona has an instruction count of 2.389E12, an execution time of 750 s, and a reference time of 9650 s.1. Find the CPI if the
Section 1.10 cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following two processors. P1 has a clock rate of 4
Assume a program requires the execution of 50 × 106 FP instructions, 110 × 106 INT instructions, 80 × 106 L/S instructions, and 16 × 106 branch instructions. The CPI for each type of instruction

Showing 1000 - 1100 of 1060

1
2
3
4
5
6
7
8
9
10
11

Get In Touch

About Us
Contact Us
Career
Jobs
FAQ
Campus Ambassador

Company Info

Security
Copyrights
Privacy Policy
Terms & Condition
SolutionInn Fee
Scholarship

Services

Sitemap
Fun
Definitions
Become Tutor
Study Help Categories
Recent Questions
Expert Questions

Copyright © 2024 SolutionInn All Rights Reserved.

Get the SolutionInn - Study Help App