Questions and Answers of Computer Organization Design

The following problems deal with translating from C to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and$s4, respectively. Assume that the base
In the following problems, the data table contains various modifications that could be made to the MIPS instruction set architecture. You will investigate the impact of these changes on the
The following table shows hexadecimal ASCII character values.Translate the hexadecimal ASCII values to text. a. b. 41 44 44 4D 49 50 53
The x86 instruction set includes the REP prefix that causes the instruction to be repeated a given number of times or until a condition is satisfied. Note that x86 instructions refer to 8 bits as a
In the following problems, we will be investigating memory operations in the context of an MIPS processor. The table below shows the values of an array stored in memory. Assume the base address of
The first three problems in this exercise assume that the function swap, is defined in C as follows:If we were sorting 8-bit bytes, not 32-bit words, how would your MIPS code for swap in 2.32.1
The following problems deal with translating from C to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
The table below contains MIPS assembly code. In the following problems, you will translate MIPS assembly code to ARM.For the table above, find the ARM assembly code that corresponds to the sequence
The following figure shows the placement of a bit field in register $t0.In the following problems, you will be asked to write MIPS instructions to extract the bits “Field” from register $t0 and
For these problems, the table holds various binary values for register $t0. Given the value of $t0, you will be asked to evaluate the outcome of different branches.Suppose the program counter (PC) is
For these problems, there are several instructions that are not included in the MIPS instruction set are shown.For each instruction in the table above, find the shortest sequence of MIPS instructions
The first three problems in this Exercise refer to a critical section of the formlock(lk);operationunlock(lk);where the “operation” updates the shared variable shvar using the local (nonshared)
The ARM processor has an interesting way of supporting immediate constants. This exercise investigates those differences. The following table contains ARM instructions.If the register R1 had the
For these problems, the table holds some C code. You will be asked to evaluate these C code statements in MIPS assembly code.How many MIPS instructions does it take to implement the C code? If the
The following table contains x86 assembly instructions.For each assembly instruction, show the size of each of the bit fields that represent the instruction. Treat the label MY_FUNCTION as a 32-bit
For the following problems, the table holds C code functions. Assume that the first function listed in the table is called first. You will be asked to translate these C code routines into MIPS
The following problems explore translating from C to MIPS. Assume that the variables f, g, h, and i are given and could be considered 32-bit integers as declared in a C program.If the variables f, g,
The table below contains the link-level details of two different procedures. In this exercise, you will be taking the place of the linker.Given your understanding of the limitations of branch and
The following problems deal with translating from C to MIPS. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.If the variables f,
This exercise deals with recursive procedure calls. For the following problems, the table has an assembly code fragment that computes the factorial of a number. However, the entries in the table have
In the following problems, the data table contains bits that represent the opcode of an instruction. You will be asked to interpret the bits as MIPS instructions into assembly code and determine what
The following problems explore translating from C to MIPS. Assume that the variables f and g are given and could be considered 32-bit integers as declared in a C program.If the variables f, g, h, i,
In the following problems, the data table contains bits that represent the opcode of an instruction. You will be asked to translate the entries into assembly code and determine what format of MIPS
Assume that the stack and the static data segments are empty and that the stack and global pointers start at address 0x7fff fffc and 0x1000 8000, respectively. Assume the calling conventions as
The following three problems in this Exercise refer to this function, written in MIPS assembly following the calling conventions from Figure 2.14:Figure 2.14This code contains a mistake that violates
The remaining three problems in this exercise refer to the following function, given in both C and x86 assembly. For each x86 instruction, we also show its length in the x86 variable-length
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
For the remaining three problems in this Exercise, we assume that the sort function from Figure 2.27 is changed in the following way:Figure 2.27Does this change affect the code for saving and
In the following problems, the data table contains hexadecimal values. You will be asked to determine what MIPS instruction the value represents, and find the MIPS instruction format.For the entries
The following problems explore the translation of hexadecimal numbers to other number formats.Translate the hexadecimal numbers above into decimal. a. Oxabcdef12 b. 0x10203040
What are the contents (values of all five elements) of array v right before the “jal sort” instruction in the main code is executed?The remaining three problems in this exercise refer to a
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
The problems in this Exercise refer to the following function, given as array code:Compare the worst-case number of executed instructions per non-last loop iteration in your array-based code from
In the following exercise, the data table contains various MIPS logical operations. You will be asked to find the result of these operations given values for registers $t0 and $t1.Assume that $t0 =
In this exercise, you will explore 32-bit constants in MIPS. For the following problems, you will be using the binary data in the table below.If the current value of the PC is 0x1FFFf000, can you use
The following problems explore number conversions from decimal to signed and unsigned binary numbers.For the base ten numbers above, convert to 2’s complement binary. a. -1ten b. 1024 ten
The table below contains MIPS assembly code. In the following problems, you will translate MIPS assembly code to ARM.Show the bit fields that represent the ARM assembly code. a. b. nor $t0, #s0,
Various C-level logical statements are shown in the table below. In this exercise, you will be asked to evaluate the statements and implement these C statements using MIPS assembly instructions.The
In the following problems, you will compare code written using the ARM and MIPS instruction sets. The following table shows code written in the ARM instruction set.What is the total number of ARM
The following problems explore number conversions from signed and unsigned binary numbers to decimal numbers.For the patterns above, what hexadecimal number does it represent? a. 0010 0100 1001 0010
In this exercise, you will explore 32-bit constants in MIPS. For the following problems, you will be using the binary data in the table below.If the current value of the PC is 0x00000600, can you use
In the following problems, the data table contains the values for registers $t0 and $t1. You will be asked to perform several MIPS logical operations on these registers.For the lines above, what is
The problems in this Exercise refer to the following function, given as array code:Translate your pointer-based C code from 2.33.2 into MIPS assembly.Data from 2.33.2Convert this function into
Suppose that we find a way to double the performance of arithmetic instructions. What is the overall speedup of our machine? What if we find a way to improve the performance of arithmetic
Assume that the data (in hexadecimal) at address 0x1000 0000 is:What value is stored at the address pointed to by register $t2? Assume that the memory location pointed to $t2 is initialized to 0x5555
The following problems deal with sign extension and over low. Registers $s0 and $s1 hold the values as shown in the table below. You will be asked to perform an MIPS assembly language instruction on
In the following problems, you will be exploring different addressing modes in the MIPS instruction set architecture. These different addressing modes are listed in the table below.List the benefits
In the following problems, you will compare code written using the ARM and MIPS instruction sets. The following table shows code written in the ARM instruction set.For the ARM assembly code above,
The first three problems in this Exercise refer to the following function, given in MIPS assembly. Unfortunately, the programmer of this function has fallen prey to the pitfall of assuming that MIPS
For these problems, the table holds some logical operations that are not included in the MIPS instruction set. How can these instructions be implemented?For your sequence of instructions in 2.15.2,
For this exercise, you will explore the range of branch and jump instructions in MIPS. For the following problems, use the hexadecimal data in the table below.In order to reduce the size of MIPS
The following table shows the proportions of instruction execution for the different instruction types.Given the instruction mix above and the assumption that an arithmetic instruction requires 2
Implement the logic equations of Exercise B.43 as a PLA.Exercise B.43We wish to add a yellow light to our traffic light example on page B-68. We will do this by changing the clock to run at 0.25 Hz
Write down the next-state and output-function tables for the traffic light controller described in Exercise B.41.Exercise B.41We wish to add a yellow light to our traffic light example on page B-68.
A Gray code is a sequence of binary numbers with the property that no more than 1 bit changes in going from one element of the sequence to another. For example, here is a 3-bit binary Gray code: 000,
Construct a 3-bit counter using three D flip-flops and a selection of gates. The inputs should consist of a signal that resets the counter to 0, called reset, and a signal to increment the counter,
Assign state numbers to the states of the finite-state machine you constructed for Exercise B.37 and write a set of logic equations for each of the outputs, including the next-state bits.Exercise
A friend would like you to build an “electronic eye” for use as a fake security device. Th e device consists of three lights lined up in a row, controlled by the outputs Left , Middle, and Right,
Figure B.8.8 on page B-55 illustrates the implementation of the register file for the MIPS datapath. Pretend that a new register file is to be built, but that there are only two registers and only
Quite often, you would expect that given a timing diagram containing a description of changes that take place on a data input D and a clock input C (as in Figures B.8.3 and B.8.6 on pages B-52 and
There are times when we want to add a collection of numbers together. Suppose you wanted to add four 4-bit numbers (A, B, E, F) using 1-bit full adders. Let?s ignore carry lookahead for now. You
Instead of thinking of an adder as a device that adds two numbers and then links the carries together, we can think of the adder as a hardware device that can add three inputs together (ai, bi, ci)
Show a truth table for a multiplexor (inputs A, B, and S; output C ), using don’t cares to simplify the table where possible.
Give an algorithm for constructing the sum-of-products representation for an arbitrary logic equation consisting of AND, OR, and NOT. The algorithm should be recursive and should not construct the
Prove that a two-input multiplexor is also universal by showing how to build the NAND (or NOR) gate using a multiplexor.
Prove that the NAND gate is universal by showing how to build the AND, OR, and NOT functions using a two-input NAND gate.
Prove that the NOR gate is universal by showing how to build the AND, OR, and NOT functions using a two-input NOR gate.
One logic function that is used for a variety of purposes (including within adders and to compute parity) is exclusive OR. The output of a two-input exclusive OR function is true only if exactly one
Show that there are 2n entries in a truth table for a function with n inputs.
Write and test a MIPS assembly language program to compute and print the first 100 prime numbers. A number n is prime if no numbers except 1 and n divide it evenly. You should implement two
Using SPIM, write and test a program that reads in a positive integer using the SPIM system calls. If the integer is not positive, the program should terminate with the message “Invalid Entry”;
The simple exception handler always jumps back to the instruction following the exception. This works fine unless the instruction that causes the exception is in the delay slot of a branch. In that
Is it ever safe for a user program to use registers $k0 or $k1?
AMD has recently announced that they will be integrating a graphics processing unit with their x86 cores in a single package, though with different clocks for each of the cores. This is an example of
Download the CUDA Toolkit and SDK from http://www.nvidia.com/object/ cuda_get.html. Make sure to use the ?emurelease? (Emulation Mode) version of the code (you will not need actual NVIDIA hardware
A systolic array is an example of an MISD machine. A systolic array is a pipeline network or “wavefront” of data processing elements. Each of these elements does not need a program counter since
Virtualization software is being aggressively deployed to reduce the costs of managing today’s high performance servers. Companies like VMWare, Microsoft and IBM have all developed a range of
What is 5ED4 - 07A4 when these values represent unsigned 16-bit hexadecimal numbers? The result should be written in hexadecimal. Show your work.
Assume that for a given program 70% of the executed instructions are arithmetic, 10% are load/store, and 20% are branch.1. Given this instruction mix and the assumption that an arithmetic instruction
Write a program in MIPS assembly language to convert an ASCII number string containing positive and negative integer decimal strings, to an integer. Your program should expect register $a0 to hold
Translate function f into MIPS assembly language. If you need to use registers $t0 through $t7, use the lower numbered registers first. Assume the function declaration for func is “int f(int a, int
Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A
Show how the value 0xabcdef12 would be arranged in memory of a little-endian and a big-endian machine. Assume the data is stored starting at address 0.
Translate 0xabcdef12 into decimal.
For each MIPS instruction, show the value of the opcode (OP), source register (RS), and target register (RT) fields. For the I-type instructions, show the value of the immediate field, and for the
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1, respectively. Also,
Rewrite the loop from Exercise 2.29 to reduce the number of MIPS instructions executed.Exercise 2.29Translate the following loop into C. Assume that the C-level integer i is held in register $t1, $s2
For each function call, show the contents of the stack after the function call is made. Assume the stack pointer is originally at address 0x7ff ff ff c, and follow the register conventions as
Write the MIPS assembly code to implement the following C code:lock(lk);shvar=max(shvar,x);unlock(lk);Assume that the address of the lk variable is in $a0, the address of the shvar variable is in
Repeat Exercise 2.43, but this time use ll/sc to perform an atomic update of the shvar variable directly, without using lock() and unlock(). Note that in this problem there is no variable lk.Exercise
What is 5ED4 - 07A4 when these values represent signed 16-bit hexadecimal numbers stored in sign-magnitude format? The result should be written in hexadecimal. Show your work.
What is 4365 - 3412 when these values represent unsigned 12-bit octal numbers? The result should be written in octal. Show your work.
Assume 151 and 214 are signed 8-bit decimal integers stored in two’s complement format. Calculate 151 - 214 using saturating arithmetic. The result should be written in decimal. Show your work.
Assume 151 and 214 are unsigned 8-bit integers. Calculate 151 + 214 using saturating arithmetic. The result should be written in decimal. Show your work.
In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following
Consider the following three CPU organizations:CPU SS: A 2-core superscalar microprocessor that provides out-of-order issue capabilities on 2 function units (FUs). Only a single thread can run on
In addition to the basic laws we discussed in this section, there are two important theorems, called DeMorgan€™s theorems:Prove DeMorgan€™s theorems with a truth table of the form
Implement the four-input odd-parity function with a PLA.
Implement the four functions described in Exercise B.11 using a PLA.Exercise B.11Assume that X consists of 3 bits, x2 x1 x0. Write four logic functions that are true if and only if■ X contains only
Assume that X consists of 3 bits, x2 x1 x0, and Y consists of 3 bits, y2 y1 y0. Write logic functions that are true if and only if■ X < Y, where X and Y are thought of as unsigned binary

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