Questions and Answers of Computer Organization Design

The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
The following three problems in this Exercise refer to this function, written in MIPS assembly following the calling conventions from Figure 2.14:Figure 2.14At the point where this function is called
The remaining three problems in this exercise refer to the following function, given in both C and x86 assembly. For each x86 instruction, we also show its length in the x86 variable-length
In the following problems, the data table contains hexadecimal values. You will be asked to determine what MIPS instruction the value represents, and find the MIPS instruction format.What type
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base
The following table shows the proportions of instruction execution for the different instruction types.For a 50% improvement in performance, how many cycles, on average, may an arithmetic instruction
For the remaining three problems in this Exercise, we assume that the sort function from Figure 2.27 is changed in the following way:Figure 2.27When sorting a 10-element array that was sorted in
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.Which processor has the highest performance expressed
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the
The following table shows manufacturing data for various processors.Find the yield. a. b. Wafer Diameter 15 cm 20 cm Dies per Wafer 84 100 Defects per Unit Area 0.020 defects/cm² 0.031
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.Find the CPI if the clock cycle time is 0.333 ns. a. b. Name Intr. Count x 10° Execution Time
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.For the same program, two
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.What is the geometric mean of the ratios between consecutive generations for both
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running
Suppose we have developed new versions of a processor with the following characteristics.How much has the capacitive load varied between versions if the dynamic power has been reduced by 10%?
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant
Consider the different conigurations shown in the tableFor a color display using 8 bits for each of the primary colors (red, green, blue) per pixel, what should be the minimum size in bytes of the
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.If the processors each execute a program in 10
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the
The following table shows manufacturing data for various processors.Find the cost per die. a. b. Wafer Diameter 15 cm 20 cm Dies per Wafer 84 100 Defects per Unit Area 0.020 defects/cm² 0.031
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.Find the SPECratio. a. b. Name Intr. Count x 10° Execution Time (seconds) Reference Time
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.Assume the average CPIs found in
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.What is the largest relative change in clock rate and power between generations?
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running
Suppose we have developed new versions of a processor with the following characteristics.How much has the dynamic power been reduced if the capacitive load does not change? a. b. Version Version
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.1015
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel
Consider the different conigurations shown in the tableHow many frames could it store, assuming the memory contains no other information? a. b. Configuration 1 2 1 2 Resolution 640 x 480 1280 x
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.We are trying to reduce the time by 30% but this leads
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the
The following table shows manufacturing data for various processors.If the number of dies per wafer is increased by 10% and the defects per area unit increases by 15%, find the die area and yield.
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.For these two benchmarks, find the geometric mean of the SPECratio. a. b. Name Intr. Count x 10°
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.A new compiler is developed that
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.How much larger is the clock rate and power of the last generation with respect
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running
Suppose we have developed new versions of a processor with the following characteristics.Assuming that the capacitive load of version 2 is 80% the capacitive load of version 1, find the voltage for
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.A
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant
Consider the different conigurations shown in the tableIf a 256 Kbytes ile is sent through the Ethernet connection, how long it would take? a. b. Configuration 1 2 1 2 Resolution 640 x 480 1280 x
For problems below, use the information about access time for every type of memory in the following table.Find how long it takes to read a file from a DRAM if it takes 2 microseconds from the cache
The table below shows the number of instructions per processor core on a multi core processor as well as the average CPI for executing the program on 1, 2, 4, or 8 cores. Using this data, you will be
For problems below, use the information in the following table.Find the IPC (instructions per cycle) for each processor. a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3 GHz 2.5 GHz 4 GHz 2 GHz 3 GHz 4
The following table shows the number of instructions for a program.Assuming that arith instructions take 1 cycle, load and store 5 cycles, and branches 2 cycles, what is the execution time of the
Suppose that, with the evolution of the electronic devices manufacturing technology, the yield varies as shown in the following table.Find the defects per area unit for each technology given a die
The following table shows data for further benchmarks.Find the increase in CPU time if the number of instructions of the benchmark is increased by 10% without affecting the CPI.
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor.Assuming
The following table shows data for further benchmarks.If the execution time is reduced by an additional 10% without affecting to the CPI and with a clock rate of 4 GHz, determine the number of
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4 GHz, and P2
Another common performance Figure is MFLOPS (million of floating-point operations per second), defined as MFLOPS = No. FP operations / (execution time × 106) but this figure has the same problems as
Consider the following values for voltage in each generation.Find the average capacitive loads, assuming a negligible static power consumption. Processor 80286 (1982) 80386 (1985) 80486
The following table shows the instruction type breakdown per processor of given applications executed in different numbers of processors.Assume that each processor has a 2 GHz clock rate.How much
Suppose that the industry trends show that a new process generation varies as follows.Find the scaling factor for the dynamic power. a. b. Capacitance 1 1 Voltage 1/2¹/2 1/21/4 Clock
Execution time in a multiprocessor system can be split into computing time for the routines plus routing time spent sending data from one processor to another. Consider the execution time and routing
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only
Consider now the dynamic power dissipation of different versions of a given processor for three different voltages given in the following table.Determine the static power at 0.8 V, assuming a static
The table below shows the number of instructions per processor core on a multi core processor as well as the average CPI for executing the program on 1, 2, 4, or 8 cores. Using this data, you will be
For problems below, use the information about access time for every type of memory in the following table.Find how long it takes to read a file from a disk if it takes 2 microseconds from the cache
For problems below, use the information in the following table.Find the clock rate for P2 that reduces its execution time to that of P1. a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3 GHz 2.5 GHz 4
The following table shows the number of instructions for a program.Find the CPI for the program. a. b. Arith 650 750 Store 100 250 Load 600 500 Branch 50 500 Total 1400 2000
Suppose that, with the evolution of the electronic devices manufacturing technology, the yield varies as shown in the following table.Represent graphically the variation of the yield together with
The following table shows data for further benchmarks.Find the increase in CPU time if the number of instructions of the benchmark is increased by 10% and the CPI is increased by 5%.
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor.Assuming
The following table shows data for further benchmarks.Determine the clock rate required to give a further 10% reduction in CPU time while maintaining the number of instructions and with the CPI
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4 GHz, and P2
Another common performance Figure is MFLOPS (million of floating-point operations per second), defined as MFLOPS = No. FP operations / (execution time × 106) but this figure has the same problems as
Execution time in a multiprocessor system can be split into computing time for the routines plus routing time spent sending data from one processor to another. Consider the execution time and routing
Consider the following values for voltage in each generation.Find the largest relative change in voltage between generations. Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium
The following table shows the instruction type breakdown per processor of given applications executed in different numbers of processors.Assume that each processor has a 2 GHz clock rate.How much
Suppose that the industry trends show that a new process generation varies as follows.Find the scaling of the capacitance per unit area unit. a. b. Capacitance 1 1 Voltage 1/2¹/2 1/21/4 Clock
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.A
Consider now the dynamic power dissipation of different versions of a given processor for three different voltages given in the following table.Determine the static and dynamic power dissipation
For problems below, use the information about access time for every type of memory in the following table.Find how long it takes to read a file from a lash memory if it takes 2 microseconds from the
The table below shows the number of instructions per processor core on a multi core processor as well as the average CPI for executing the program on 1, 2, 4, or 8 cores. Using this data, you will be
For problems below, use the information in the following table.Find the number of instructions for P2 that reduces its execution time to that of P3. a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3
The following table shows the number of instructions for a program.If the number of load instructions can be reduced by one half, what is the speedup and the CPI?
The following table shows data for further benchmarks.Find the change in the SPECratio for the change described in 1.12.5. a. b. Name libquantum astar CPI 1.61 1.79 Clock Rate 4 GHz 4
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor.Assuming
The following table shows data for further benchmarks.Determine the clock rate if the CPI is reduced by 15% and the CPU time by 20% while the number of instructions is unchanged.
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4 GHz, and P2
Another common performance Figure is MFLOPS (million of floating-point operations per second), defined as MFLOPS = No. FP operations / (execution time × 106) but this figure has the same problems as
Consider the following values for voltage in each generation.Find the geometric mean of the voltage ratios in the generations since the Pentium. Processor 80286 (1982) 80386 (1985) 80486
The following table shows the instruction type breakdown per processor of given applications executed in different numbers of processors.Assume that each processor has a 2 GHz clock rate.How much is
Suppose that the industry trends show that a new process generation varies as follows.Assuming a Core 2 processor with a clock rate of 2.667 GHz, a power consumption of 95 W, and a voltage of 1.1 V,
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.Part

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