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computer science
computer organization design

Computer Organization And Design The Hardware Software Interface 4th Revised Edition David A. Patterson, John L. Hennessy - Solutions

What are the contents of array v right before the sort function enters its outer loop for the first time? Assume that registers $sp, $s0, $s1, $s2, and $s3 have values of 0x1000, 20, 40, 7, and 1, respectively, at the beginning of the main code (right before “li $s0, 5” is executed).The $main() { Main Code in C int *v: int n=5; v=my_alloc(5); my_init(v.n); sort (v.n); main: 11 $50,5 move jal$ $my_alloc in C n) { int *my_alloc(int int arr[n]: return arr: } my_alloc: addu SW move s11 sub move move 1w$
For these problems, the table holds various binary values for register $t0. Given the value of $t0, you will be asked to evaluate the outcome of different branches.Suppose that register $t0 contains a value from above. What is the value of $t2 after the following instructions? a. 0x00101000 b.
In the following problems, you will perform various MIPS operations on a pair of registers, $s0 and $s1. Given the values of $s0 and $s1 in each of the questions below, state if there will be over low.Assume that register $s0 = 0x40000000 and $s1 = 0x20000000. For the table above, will there be
For these problems, the table holds MIPS assembly code fragments. You will be asked to evaluate each of the code fragments, familiarizing you with the different MIPS branch instructions.For each of the loops above, write the equivalent C code routine. Assume that the registers $s1, $s2, $t1, and
For these problems, the table holds MIPS assembly code fragments. You will be asked to evaluate each of the code fragments, familiarizing you with the different MIPS branch instructions.Translate the loops above into C. Assume that the C-level integer i is held in register $t1, $s2 holds the
The following problems deal with translating from MIPS to C. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f? a. b. addi f, f.
The following three problems in this Exercise refer to a function f that calls another function func. The code for C function func is already compiled in another module using the MIPS calling convention from Figure 2.14. The function declaration for func is “int func(int a, int b);”. The code
The table below contains various values for register $s1. You will be asked to evaluate if there would be overflow for a given operation.Assume that register $s0 = 0x70000000 and $s1 has the value as given in the table. If the instruction: add $s0, $s0, $s1 is executed, what is the result in hex?
The following problems deal with translating from MIPS to C. For the following exercise, assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end
For the following problems, the table has an assembly code fragment that computes a Fibonacci number. However, the entries in the table have errors, and you will be asked to ix these errors. For number n, the Fibonacci of n is calculated as follows:For the recursive Fibonacci MIPS program above,
In the following problems, the data table contains MIPS instructions. You will be asked to translate the entries into the bits of the opcode and determine the MIPS instruction format.What type (I-type, R-type, J-type) instruction do the instructions above represent? a. addi $t0, $t0, 0 b. sw $t1,
The following problems deal with translating from MIPS to C. Assume that the variables g, h, i, and j are given and could be considered 32-bit integers as declared in a C program.If the variables f, g, h, and i have values 1, 2, 3, and 4, respectively, what is the end value of f? a. b. addi f, f,
In the following problems, the data table contains the values of various fields of MIPS instructions. You will be asked to determine what the instruction is, and find the MIPS format for the instruction.What is the MIPS assembly instruction described above? a. op=0, rs=3, rt=2, rd=3, shamt=0,
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively.How many registers are needed
The following three problems in this Exercise refer to this function, written in MIPS assembly following the calling conventions from Figure 2.14:Figure 2.14At the point where this function is called register $a0, $a1, $a2, and $a3 have values 1, 100, 1000, and 30, respectively. What is the value
The remaining three problems in this exercise refer to the following function, given in both C and x86 assembly. For each x86 instruction, we also show its length in the x86 variable-length instruction format and the interpretation (what the instruction does). Note that the x86 architecture has
In the following problems, the data table contains hexadecimal values. You will be asked to determine what MIPS instruction the value represents, and find the MIPS instruction format.What type (I-type, R-type, J-type) instruction do the binary entries above represent? What is the value of the op
The following problems deal with translating from MIPS to C. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively.For each MIPS instruction, show
The following table shows the proportions of instruction execution for the different instruction types.For a 50% improvement in performance, how many cycles, on average, may an arithmetic instruction take if load/store and branch instructions are not improved at all?
For the remaining three problems in this Exercise, we assume that the sort function from Figure 2.27 is changed in the following way:Figure 2.27When sorting a 10-element array that was sorted in descending order (opposite of the order that sort() creates), how many more (or fewer) instructions are
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel processors.The table above shows the number of instructions required per processor to complete a program
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.Which processor has the highest performance expressed in instructions per second? a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3 GHz 2.5 GHz 4 GHz 2 GHz 3
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table.Given a program with 106 instructions divided into classes as follows: 10% class A,
The following table shows manufacturing data for various processors.Find the yield. a. b. Wafer Diameter 15 cm 20 cm Dies per Wafer 84 100 Defects per Unit Area 0.020 defects/cm² 0.031 defects/cm² Cost per Wafer 12 15
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.Find the CPI if the clock cycle time is 0.333 ns. a. b. Name Intr. Count x 10° Execution Time (seconds) Reference Time (seconds) bzip2 2389 750 9650 go 1658 700 10,490
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.Assume that peak performance is defined as the fastest rate that a computer can
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15% from the values shown for each benchmark in Exercise 1.12. The
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.For the same program, two different compilers are used. The table above shows the execution time of the two different compiled
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different processors.One usual fallacy is to consider the computer with the largest clock rate as having the largest
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.What is the geometric mean of the ratios between consecutive generations for both clock rate and power? Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium Pro
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running programs with CPU times shown in the following table.How much is the total time reduced if the time for
Suppose we have developed new versions of a processor with the following characteristics.How much has the capacitive load varied between versions if the dynamic power has been reduced by 10%? a. b. Version Version 1 Version 2 Version 1 Version 2 Voltage 1.75 V 1.2 V 1.1 V 0.8 V Clock Rate 1.5 GHz 2
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following table shows the execution time of five routines of a program running on different numbers of
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.Computer used to run large problems and usually accessed via a network 1. 2. 3. 4. virtual
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant is the static power. Assume the figures shown in the following table for static and dynamic power
Consider the different conigurations shown in the tableFor a color display using 8 bits for each of the primary colors (red, green, blue) per pixel, what should be the minimum size in bytes of the frame buffer to store a frame? a. b. Configuration 1 2 1 2 Resolution 640 x 480 1280 x 1024 1024 x
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel processors.Given the CPI values on the right of the table above, find the total execution time for this
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions. a. b. Processor P1 P2 P3 P1 P2 P3 Clock
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table.What is the global CPI for each implementation? a. b. P1 P2 P1 P2 Clock Rate 2.5
The following table shows manufacturing data for various processors.Find the cost per die. a. b. Wafer Diameter 15 cm 20 cm Dies per Wafer 84 100 Defects per Unit Area 0.020 defects/cm² 0.031 defects/cm² Cost per Wafer 12 15
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.Find the SPECratio. a. b. Name Intr. Count x 10° Execution Time (seconds) Reference Time (seconds) bzip2 2389 750 9650 go 1658 700 10,490
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.If the number of instructions executed in a certain program is divided equally among
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15% from the values shown for each benchmark in Exercise 1.12. The
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.Assume the average CPIs found in 1.6.1, but that the compiled programs run on two different processors. If the execution times on the
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different processors.Another fallacy is to consider that the processor executing the largest number of instructions
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.What is the largest relative change in clock rate and power between generations? Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium Pro (1997) Pentium 4
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running programs with CPU times shown in the following table.How much is the time for INT operations reduced if
Suppose we have developed new versions of a processor with the following characteristics.How much has the dynamic power been reduced if the capacitive load does not change? a. b. Version Version 1 Version 2 Version 1 Version 2 Voltage 1.75 V 1.2 V 1.1 V 0.8 V Clock Rate 1.5 GHz 2 GHz 3 GHz 4 GHz
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.1015 or 250 bytes 1. 2. 3. 4. virtual worlds desktop computers 11. 12. 13. servers low-end
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following table shows the execution time of five routines of a program running on different numbers of
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant is the static power. Assume the figures shown in the following table for static and dynamic power
The table below shows the instruction type breakdown of a given application executed on 1, 2, 4, or 8 processors. Using this data, you will be exploring the speedup of applications on parallel processors.If the CPI of the arithmetic instructions was doubled, what would the impact be on the
Consider the different conigurations shown in the tableHow many frames could it store, assuming the memory contains no other information? a. b. Configuration 1 2 1 2 Resolution 640 x 480 1280 x 1024 1024 x 768 2560 x 1600 Main Memory 2 Gbytes 4 Gbytes 2 Gbytes 4 Gbytes Ethernet Network 100 Mbit 1
Consider three different processors P1, P2, and P3 executing the same instruction set with the clock rates and CPIs given in the following table.We are trying to reduce the time by 30% but this leads to an increase of 20% in the CPI. What clock rate should we have to get this time reduction?
Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table.Find the clock cycles required in both cases. a. b. P1 P2 P1 P2 Clock Rate 2.5
The following table shows manufacturing data for various processors.If the number of dies per wafer is increased by 10% and the defects per area unit increases by 15%, find the die area and yield. a. b. Wafer Diameter 15 cm 20 cm Dies per Wafer 84 100 Defects per Unit Area 0.020 defects/cm² 0.031
The following table shows results for SPEC CPU2006 benchmark programs running on an AMD Barcelona.For these two benchmarks, find the geometric mean of the SPECratio. a. b. Name Intr. Count x 10° Execution Time (seconds) Reference Time (seconds) bzip2 2389 750 9650 go 1658 700 10,490
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. The clock rate and CPI of each class is given below.If the number of instructions executed in a certain program is divided equally among
Suppose that we are developing a new version of the AMD Barcelona processor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15% from the values shown for each benchmark in Exercise 1.12. The
Compilers can have a profound impact on the performance of an application on given a processor. This problem will explore the impact compilers have on execution time.A new compiler is developed that uses only 600 million instructions and has an average CPI of 1.1. What is the speedup of using this
Cites as a pitfall the utilization of a subset of the performance equation as a performance metric. To illustrate this, consider the following data for the execution of a program in different processors.A common fallacy is to use MIPS (millions of instructions per second) to compare the performance
The following table shows the increase in clock rate and power of eight generations of Intel processors over 28 years.How much larger is the clock rate and power of the last generation with respect to the first generation? Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium Pro
Another pitfall cited is expecting to improve the overall performance of a computer by improving only one aspect of the computer. This might be true, but not always. Consider a computer running programs with CPU times shown in the following table.Can the total time can be reduced by 20% by reducing
Suppose we have developed new versions of a processor with the following characteristics.Assuming that the capacitive load of version 2 is 80% the capacitive load of version 1, find the voltage for version 2 if the dynamic power of version 2 is reduced by 40% from version 1. a. b. Version Version
Another pitfall, related to the execution of programs in multiprocessor systems, is expecting improvement in performance by improving only the execution time of part of the routines. The following table shows the execution time of five routines of a program running on different numbers of
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.A class of computers composed of hundred to thousand processors and terabytes of memory and having the
Although the dynamic power is the primary source of power dissipation in CMOS, leakage current produces a static power dissipation V × Ileak. The smaller the on chip dimensions, the more significant is the static power. Assume the figures shown in the following table for static and dynamic power
Consider the different conigurations shown in the tableIf a 256 Kbytes ile is sent through the Ethernet connection, how long it would take? a. b. Configuration 1 2 1 2 Resolution 640 x 480 1280 x 1024 1024 x 768 2560 x 1600 Main Memory 2 Gbytes 4 Gbytes 2 Gbytes 4 Gbytes Ethernet Network 100 Mbit 1
For problems below, use the information about access time for every type of memory in the following table.Find how long it takes to read a file from a DRAM if it takes 2 microseconds from the cache memory. a. b. Cache 5 ns 7 ns DRAM 50 ns 70 ns Flash Memory 5 με 15 μs Magnetic Disk 5 ms 20 ms
The table below shows the number of instructions per processor core on a multi core processor as well as the average CPI for executing the program on 1, 2, 4, or 8 cores. Using this data, you will be exploring the speedup of applications on multicore processors.Assuming a 3 GHz clock frequency,
For problems below, use the information in the following table.Find the IPC (instructions per cycle) for each processor. a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3 GHz 2.5 GHz 4 GHz 2 GHz 3 GHz 4 GHz No. Instructions 20.00E+09 30.00E+09 90.00E+09 20.00E+09 30.00E+09 25.00E+09 Time 7s 10 s 9 s 5
The following table shows the number of instructions for a program.Assuming that arith instructions take 1 cycle, load and store 5 cycles, and branches 2 cycles, what is the execution time of the program in a 2 GHz processor?
Suppose that, with the evolution of the electronic devices manufacturing technology, the yield varies as shown in the following table.Find the defects per area unit for each technology given a die area of 200 mm2. Yield T1 0.85 T2 0.89 T3 0.92 T4 0.95
The following table shows data for further benchmarks.Find the increase in CPU time if the number of instructions of the benchmark is increased by 10% without affecting the CPI. a. b. Name libquantum astar CPI 1.61 1.79 Clock Rate 4 GHz 4 GHz SPECratio 19.8 9.1
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor.Assuming that computes take 1 cycle, loads and store instructions take 10 cycles, and branches take 3 cycles,
The following table shows data for further benchmarks.If the execution time is reduced by an additional 10% without affecting to the CPI and with a clock rate of 4 GHz, determine the number of instructions. a. b. Name libquantum astar Execution Time (seconds) 960 690 CPI 1.61 1.79 Clock Rate 3
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4 GHz, and P2 has a clock rate of 6 GHz. The average number of cycles for each instruction class for P1 and P2
Another common performance Figure is MFLOPS (million of floating-point operations per second), defined as MFLOPS = No. FP operations / (execution time × 106) but this figure has the same problems as MIPS. Consider the program in the following table, running on the two processors below.Find the
Consider the following values for voltage in each generation.Find the average capacitive loads, assuming a negligible static power consumption. Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium Pro (1997) Pentium 4 Willamette (2001) Pentium 4 Prescott (2004) Core 2 Ketsfield
The following table shows the instruction type breakdown per processor of given applications executed in different numbers of processors.Assume that each processor has a 2 GHz clock rate.How much must we improve the CPI of FP instructions if we want the program to run two times faster?
Suppose that the industry trends show that a new process generation varies as follows.Find the scaling factor for the dynamic power. a. b. Capacitance 1 1 Voltage 1/2¹/2 1/21/4 Clock Rate 1.15 1.2 Area 1/2¹/2 1/2¹/4
Execution time in a multiprocessor system can be split into computing time for the routines plus routing time spent sending data from one processor to another. Consider the execution time and routing time given in the following table. In this case, the routing time is an important component of the
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.Today’s science fiction application that probably will be available in the near future
Consider now the dynamic power dissipation of different versions of a given processor for three different voltages given in the following table.Determine the static power at 0.8 V, assuming a static to dynamic power ratio of 0.6. a. b. 1.2 V 75 W 62 W 1.0 V 60 W 50 W 0.8 V 35 W 30 W
The table below shows the number of instructions per processor core on a multi core processor as well as the average CPI for executing the program on 1, 2, 4, or 8 cores. Using this data, you will be exploring the speedup of applications on multicore processors.Assume that the power consumption of
For problems below, use the information about access time for every type of memory in the following table.Find how long it takes to read a file from a disk if it takes 2 microseconds from the cache memory a. b. Cache 5 ns 7 ns DRAM 50 ns 70 ns Flash Memory 5 με 15 μs Magnetic Disk 5 ms 20 ms
For problems below, use the information in the following table.Find the clock rate for P2 that reduces its execution time to that of P1. a. b. Processor P1 P2 P3 P1 P2 P3 Clock Rate 3 GHz 2.5 GHz 4 GHz 2 GHz 3 GHz 4 GHz No.
The following table shows the number of instructions for a program.Find the CPI for the program. a. b. Arith 650 750 Store 100 250 Load 600 500 Branch 50 500 Total 1400 2000
Suppose that, with the evolution of the electronic devices manufacturing technology, the yield varies as shown in the following table.Represent graphically the variation of the yield together with the variation of defects per unit area. Yield T1 0.85 T2 0.89 T3 0.92 T4 0.95
The following table shows data for further benchmarks.Find the increase in CPU time if the number of instructions of the benchmark is increased by 10% and the CPI is increased by 5%. a. b. Name libquantum astar CPI 1.61 1.79 Clock Rate 4 GHz 4 GHz SPECratio 19.8 9.1
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor.Assuming that computes take 1 cycle, loads and store instructions take 2 cycles, and branches take 3 cycles,
The following table shows data for further benchmarks.Determine the clock rate required to give a further 10% reduction in CPU time while maintaining the number of instructions and with the CPI unchanged. a. b. Name libquantum astar Execution Time (seconds) 960 690 CPI 1.61 1.79 Clock Rate 3 GHz 3
Consider two different implementations, P1 and P2, of the same instruction set. There are five classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4 GHz, and P2 has a clock rate of 6 GHz. The average number of cycles for each instruction class for P1 and P2
Another common performance Figure is MFLOPS (million of floating-point operations per second), defined as MFLOPS = No. FP operations / (execution time × 106) but this figure has the same problems as MIPS. Consider the program in the following table, running on the two processors below.Find the
Execution time in a multiprocessor system can be split into computing time for the routines plus routing time spent sending data from one processor to another. Consider the execution time and routing time given in the following table. In this case, the routing time is an important component of the
Consider the following values for voltage in each generation.Find the largest relative change in voltage between generations. Processor 80286 (1982) 80386 (1985) 80486 (1989) Pentium (1993) Pentium Pro (1997) Pentium 4 Willamette (2001) Pentium 4 Prescott (2004) Core 2 Ketsfield
The following table shows the instruction type breakdown per processor of given applications executed in different numbers of processors.Assume that each processor has a 2 GHz clock rate.How much must we improve the CPI of L/S instructions if we want the program to run two times faster?
Suppose that the industry trends show that a new process generation varies as follows.Find the scaling of the capacitance per unit area unit. a. b. Capacitance 1 1 Voltage 1/2¹/2 1/21/4 Clock Rate 1.15 1.2 Area 1/2¹/2 1/2¹/4
Find the word or phrase from the list below that best matches the description in the following questions. Use the numbers to the left of words in the answer. Each answer should be used only once.A kind of memory called random access memory 1. 2. 3. 4. virtual worlds desktop
Consider now the dynamic power dissipation of different versions of a given processor for three different voltages given in the following table.Determine the static and dynamic power dissipation assuming the rates obtained in problem 1.9.1. a. b. 1.2 V 75 W 62 W 1.0 V 60 W 50 W 0.8 V 35 W 30 W

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